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Volume 1, Issue 4, October 2014
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Title / Author(s) |
Abstract |
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1. |
An Optimised Implementation of Steganography with two level of Security Author
(s) :Vartika Pandya, Meenal Jain, Ravimohan | SRIT, Jabalpur | pp 05-08 |
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2. |
Vedic Optimized ALU with a new Approach Urdhva Triyambakam Multiplier Author
(s): Nidhi Rajput, Rakesh Patel | Takshshila., Jabalpur | pp 09-13 |
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3. |
An Implementation of RISC Processor for DSP Applications Author(s): Shaily
Agrawal, Shadma Pragi | Takhshshila, Jabalpur | pp 14-18 |
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4. |
Twice Steganography Method along with DWT for Highly Secure Data Transmission
Author(s) : Jyoti Viswakarma, Rashika Gupta, Ravimohan | SRIT, Jabalpur | pp 19-23 |
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5. |
Design and Implementation of Pipelined 8-Bit Binary Multiplier Using M.G.D.I.
Technique Author(s): Nitin Singh, M.Zahid Alam | L.N.C.T., Bhopal | pp 24-31 |
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6. |
Object Oriented Framework for MCDM and DSS Modelling
Author(s): Dr. Mamta
Lambert | JEC, Jabalpur | pp 32-37 |
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7. |
Simulation of Grayhole Attack Author(s): Dr. Mamta Lambert, Sharda Prasad Patel
| JEC, Jabalpur | pp 38-44 |
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